Freescale Semiconductor /MKL27Z4 /USB0 /CTL

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Interpret as CTL

7 43 0 0 00 0 0 0 0 0 0 0 0 (0)USBENSOFEN 0 (ODDRST)ODDRST 0 (TXSUSPENDTOKENBUSY)TXSUSPENDTOKENBUSY 0 (SE0)SE0 0 (JSTATE)JSTATE

USBENSOFEN=0

Description

Control register

Fields

USBENSOFEN

USB Enable

0 (0): Disables the USB Module.

1 (1): Enables the USB Module.

ODDRST

Setting this bit to 1 resets all the BDT ODD ping/pong fields to 0, which then specifies the EVEN BDT bank

TXSUSPENDTOKENBUSY

In Target mode, TXD_SUSPEND is set when the SIE has disabled packet transmission and reception

SE0

Live USB Single Ended Zero signal

JSTATE

Live USB differential receiver JSTATE signal

Links

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